Search Result
2019
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[Ego19] L. Ego Memory Synchronization Techniques |
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[Ego19a] L. Ego Memory Synchronization Techniques Presentation |
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[Senf19] M. Senftleben Modelling Memory Consistency Models for Formal Verification PhD Thesis |
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[Senf19a] M. Senftleben Modelling Memory Consistency Models for Formal Verification Presentation |
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[Tiss19] S. Tissen Weak Memory Semantics |
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[Tiss19a] S. Tissen Weak Memory Semantics Presentation |
2018
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[Geor18] G. Georgopoulos Operational Semantics of Memory System Implementations Master Thesis |
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[SeSc18] M. Senftleben and K. Schneider Operational Characterization of Weak Memory Consistency Models International Conference on Architecture of Computing Systems (ARCS) |
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[SeSc18a] M. Senftleben and K. Schneider Using Temporal Logics for Specifying Weak Memory Consistency Models International Journal of Critical Computer-Based Systems (IJCCBS) |
2017
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[Grue17] E. Grüner Systematic Testing and Stateless Model Checking |
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[Leon17] V. Leonhardt Hoare Calculus for SIMT Programms |
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[Leon17a] V. Leonhardt Hoare Calculus for SIMT Programs Presentation |
2016
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[Geor16] G. Georgopoulos Memory Consistency Models of Modern CPUs |
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[Geor16a] G. Georgopoulos Memory Consistency Models of Modern CPUs Presentation |
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[Herr16] F. Herrmann State of the Art in Temporal Logic Verification |
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[Herr16a] F. Herrmann State of the Art in Temporal Logic Verification Presentation |
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[SeSc16] M. Senftleben and K. Schneider Specifying Weak Memory Consistency with Temporal Logic Verification and Evaluation of Computer and Communication Systems (VECoS) |
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[SeSc16a] M. Senftleben and K. Schneider Specifying Weak Memory Consistency with Temporal Logic Presentation |
2015
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[Betz15] A. Betz x86 Memory Consistency |
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[BhSS15] N. Bhardwaj and M. Senftleben and K. Schneider Abacus - A Processor Family for Education Workshop on Embedded and Cyber-Physical Systems Education (WESE) |
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[Bich15] F. Bichued Verification of Microprocessors Master Thesis |
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[FMSS15] F. Furbach and R. Meyer and K. Schneider and M. Senftleben Memory-Model-aware Testing -- A Unified Complexity Analysis Transactions on Embedded Computing Systems (TECS) |
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[Froe15] J. Frömmer Hoare Calculi for Parallel Programs |
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[Grei15] T. Greiner The use of weak consistency models in cloud storage |
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[Klip15] N. Klipphahn Concurrent Model Checking -- Systematic testing/Stateless Model Checking |
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[Klip15a] N. Klipphahn Concurrent Model Checking -- Systematic testing/Stateless Model Checking Presentation |
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[Pahl15] P. Pahlevannejad Speculative Relaxation of Memory Consistency |
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[Pahl15a] P. Pahlevannejad Speculative Relaxation of Memory Consistency Presentation |
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[Stra15] J. Stratmann Implementation and Verification of IEEE-conform Floating-Point Arithmetic Master Thesis |
2014
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[BhSS14a] N. Bhardwaj and M. Senftleben and K. Schneider Abacus – A Processor Family for Education Presentation |
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[FMSS14] F. Furbach and R. Meyer and K. Schneider and M. Senftleben Memory Model-Aware Testing - A Unified Complexity Analysis Application of Concurrency to System Design (ACSD) |
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[FMSS14a] F. Furbach and R. Meyer and K. Schneider and M. Senftleben Memory Model-aware Testing -- A Unified Complexity Analysis Presentation |
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[Heer14] M. Heer Assembler Code-Generierung aus synchronen Aktionen Bachelor Thesis |
2013
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[Senf13] M. Senftleben Operational Characterization of Weak Memory Consistency Models Master Thesis |
2012
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[Senf12] M. Senftleben Dataflow Programming on GPUs |
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[Senf12a] M. Senftleben Dataflow Programming on GPUs Presentation |
2011
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[Senf11] M. Senftleben Web-based instruction-level simulation of a parameterized dynamic processor Bachelor Thesis |